87 lines
2.4 KiB
NASM
87 lines
2.4 KiB
NASM
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; jsimdcpu.asm - SIMD instruction support check
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;
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; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
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; Copyright (C) 2016, D. R. Commander.
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;
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; Based on
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; x86 SIMD extension for IJG JPEG library
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; Copyright (C) 1999-2006, MIYASAKA Masaru.
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; For conditions of distribution and use, see copyright notice in jsimdext.inc
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;
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; This file should be assembled with NASM (Netwide Assembler),
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; can *not* be assembled with Microsoft's MASM or any compatible
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; assembler (including Borland's Turbo Assembler).
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; NASM is available from http://nasm.sourceforge.net/ or
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; http://sourceforge.net/project/showfiles.php?group_id=6208
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%include "jsimdext.inc"
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; --------------------------------------------------------------------------
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SECTION SEG_TEXT
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BITS 64
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;
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; Check if the CPU supports SIMD instructions
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;
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; GLOBAL(unsigned int)
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; jpeg_simd_cpu_support(void)
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;
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align 32
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GLOBAL_FUNCTION(jpeg_simd_cpu_support)
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EXTN(jpeg_simd_cpu_support):
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push rbx
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push rdi
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xor rdi, rdi ; simd support flag
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; Assume that all x86-64 processors support SSE & SSE2 instructions
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or rdi, JSIMD_SSE2
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or rdi, JSIMD_SSE
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; Check whether CPUID leaf 07H is supported
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; (leaf 07H is used to check for AVX2 instruction support)
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mov rax, 0
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cpuid
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cmp rax, 7
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jl short .return ; Maximum leaf < 07H
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; Check for AVX2 instruction support
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mov rax, 7
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xor rcx, rcx
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cpuid
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mov rax, rbx ; rax = Extended feature flags
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test rax, 1<<5 ; bit5:AVX2
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jz short .return
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; Check for AVX2 O/S support
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mov rax, 1
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xor rcx, rcx
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cpuid
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test rcx, 1<<27
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jz short .return ; O/S does not support XSAVE
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test rcx, 1<<28
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jz short .return ; CPU does not support AVX2
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xor rcx, rcx
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xgetbv
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and rax, 6
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cmp rax, 6 ; O/S does not manage XMM/YMM state
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; using XSAVE
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jnz short .return
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or rdi, JSIMD_AVX2
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.return:
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mov rax, rdi
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pop rdi
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pop rbx
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ret
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; For some reason, the OS X linker does not honor the request to align the
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; segment unless we do this.
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align 32
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