220 lines
8.5 KiB
C
220 lines
8.5 KiB
C
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// Copyright (c) 2014 The Chromium Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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// This file is an internal atomic implementation, use atomicops.h instead.
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//
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// This implementation uses C++11 atomics' member functions. The code base is
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// currently written assuming atomicity revolves around accesses instead of
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// C++11's memory locations. The burden is on the programmer to ensure that all
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// memory locations accessed atomically are never accessed non-atomically (tsan
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// should help with this).
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//
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// TODO(jfb) Modify the atomicops.h API and user code to declare atomic
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// locations as truly atomic. See the static_assert below.
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//
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// Of note in this implementation:
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// * All NoBarrier variants are implemented as relaxed.
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// * All Barrier variants are implemented as sequentially-consistent.
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// * Compare exchange's failure ordering is always the same as the success one
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// (except for release, which fails as relaxed): using a weaker ordering is
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// only valid under certain uses of compare exchange.
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// * Acquire store doesn't exist in the C11 memory model, it is instead
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// implemented as a relaxed store followed by a sequentially consistent
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// fence.
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// * Release load doesn't exist in the C11 memory model, it is instead
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// implemented as sequentially consistent fence followed by a relaxed load.
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// * Atomic increment is expected to return the post-incremented value, whereas
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// C11 fetch add returns the previous value. The implementation therefore
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// needs to increment twice (which the compiler should be able to detect and
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// optimize).
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#ifndef BASE_ATOMICOPS_INTERNALS_PORTABLE_H_
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#define BASE_ATOMICOPS_INTERNALS_PORTABLE_H_
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#include <atomic>
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#include "build/build_config.h"
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namespace base {
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namespace subtle {
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// This implementation is transitional and maintains the original API for
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// atomicops.h. This requires casting memory locations to the atomic types, and
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// assumes that the API and the C++11 implementation are layout-compatible,
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// which isn't true for all implementations or hardware platforms. The static
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// assertion should detect this issue, were it to fire then this header
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// shouldn't be used.
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//
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// TODO(jfb) If this header manages to stay committed then the API should be
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// modified, and all call sites updated.
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typedef volatile std::atomic<Atomic32>* AtomicLocation32;
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static_assert(sizeof(*(AtomicLocation32) nullptr) == sizeof(Atomic32),
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"incompatible 32-bit atomic layout");
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inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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((AtomicLocation32)ptr)
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->compare_exchange_strong(old_value,
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new_value,
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std::memory_order_relaxed,
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std::memory_order_relaxed);
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return old_value;
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}
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inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr,
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Atomic32 new_value) {
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return ((AtomicLocation32)ptr)
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->exchange(new_value, std::memory_order_relaxed);
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}
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inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
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Atomic32 increment) {
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return increment +
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((AtomicLocation32)ptr)
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->fetch_add(increment, std::memory_order_relaxed);
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}
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inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
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Atomic32 increment) {
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return increment + ((AtomicLocation32)ptr)->fetch_add(increment);
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}
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inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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((AtomicLocation32)ptr)
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->compare_exchange_strong(old_value,
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new_value,
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std::memory_order_acquire,
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std::memory_order_acquire);
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return old_value;
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}
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inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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((AtomicLocation32)ptr)
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->compare_exchange_strong(old_value,
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new_value,
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std::memory_order_release,
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std::memory_order_relaxed);
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return old_value;
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}
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inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
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((AtomicLocation32)ptr)->store(value, std::memory_order_relaxed);
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}
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inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
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((AtomicLocation32)ptr)->store(value, std::memory_order_relaxed);
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std::atomic_thread_fence(std::memory_order_seq_cst);
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}
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inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
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((AtomicLocation32)ptr)->store(value, std::memory_order_release);
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}
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inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
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return ((AtomicLocation32)ptr)->load(std::memory_order_relaxed);
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}
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inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
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return ((AtomicLocation32)ptr)->load(std::memory_order_acquire);
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}
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inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
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std::atomic_thread_fence(std::memory_order_seq_cst);
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return ((AtomicLocation32)ptr)->load(std::memory_order_relaxed);
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}
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#if defined(ARCH_CPU_64_BITS)
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typedef volatile std::atomic<Atomic64>* AtomicLocation64;
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static_assert(sizeof(*(AtomicLocation64) nullptr) == sizeof(Atomic64),
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"incompatible 64-bit atomic layout");
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inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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((AtomicLocation64)ptr)
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->compare_exchange_strong(old_value,
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new_value,
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std::memory_order_relaxed,
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std::memory_order_relaxed);
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return old_value;
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}
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inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr,
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Atomic64 new_value) {
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return ((AtomicLocation64)ptr)
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->exchange(new_value, std::memory_order_relaxed);
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}
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inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr,
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Atomic64 increment) {
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return increment +
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((AtomicLocation64)ptr)
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->fetch_add(increment, std::memory_order_relaxed);
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}
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inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr,
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Atomic64 increment) {
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return increment + ((AtomicLocation64)ptr)->fetch_add(increment);
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}
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inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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((AtomicLocation64)ptr)
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->compare_exchange_strong(old_value,
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new_value,
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std::memory_order_acquire,
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std::memory_order_acquire);
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return old_value;
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}
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inline Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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((AtomicLocation64)ptr)
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->compare_exchange_strong(old_value,
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new_value,
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std::memory_order_release,
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std::memory_order_relaxed);
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return old_value;
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}
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inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
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((AtomicLocation64)ptr)->store(value, std::memory_order_relaxed);
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}
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inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
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((AtomicLocation64)ptr)->store(value, std::memory_order_relaxed);
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std::atomic_thread_fence(std::memory_order_seq_cst);
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}
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inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
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((AtomicLocation64)ptr)->store(value, std::memory_order_release);
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}
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inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
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return ((AtomicLocation64)ptr)->load(std::memory_order_relaxed);
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}
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inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
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return ((AtomicLocation64)ptr)->load(std::memory_order_acquire);
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}
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inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
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std::atomic_thread_fence(std::memory_order_seq_cst);
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return ((AtomicLocation64)ptr)->load(std::memory_order_relaxed);
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}
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#endif // defined(ARCH_CPU_64_BITS)
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} // namespace subtle
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} // namespace base
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#endif // BASE_ATOMICOPS_INTERNALS_PORTABLE_H_
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