121 lines
4.9 KiB
C++
121 lines
4.9 KiB
C++
// Copyright 2019 The Chromium Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#include <pthread.h>
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#include "base/process/process_handle.h"
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#include "base/profiler/thread_delegate_posix.h"
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#include "base/stl_util.h"
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#include "build/build_config.h"
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namespace base {
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namespace {
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uintptr_t GetThreadStackBaseAddressImpl(
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SamplingProfilerThreadToken thread_token) {
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pthread_attr_t attr;
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pthread_getattr_np(thread_token.pthread_id, &attr);
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// See crbug.com/617730 for limitations of this approach on Linux.
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void* address;
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size_t size;
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pthread_attr_getstack(&attr, &address, &size);
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pthread_attr_destroy(&attr);
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const uintptr_t base_address = reinterpret_cast<uintptr_t>(address) + size;
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return base_address;
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}
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uintptr_t GetThreadStackBaseAddress(SamplingProfilerThreadToken thread_token) {
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#if defined(OS_ANDROID)
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// Caches the main thread base address on Android since Bionic has to read
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// /proc/$PID/maps to obtain it. Other thread base addresses are sourced from
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// pthread state so are cheap to get.
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const bool is_main_thread = thread_token.id == GetCurrentProcId();
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if (is_main_thread) {
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static const uintptr_t main_thread_base_address =
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GetThreadStackBaseAddressImpl(thread_token);
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return main_thread_base_address;
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}
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#endif
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return GetThreadStackBaseAddressImpl(thread_token);
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}
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} // namespace
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ThreadDelegatePosix::ThreadDelegatePosix(
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SamplingProfilerThreadToken thread_token)
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: thread_id_(thread_token.id),
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thread_stack_base_address_(GetThreadStackBaseAddress(thread_token)) {}
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PlatformThreadId ThreadDelegatePosix::GetThreadId() const {
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return thread_id_;
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}
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uintptr_t ThreadDelegatePosix::GetStackBaseAddress() const {
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return thread_stack_base_address_;
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}
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std::vector<uintptr_t*> ThreadDelegatePosix::GetRegistersToRewrite(
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RegisterContext* thread_context) {
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#if defined(ARCH_CPU_ARM_FAMILY) && defined(ARCH_CPU_32_BITS)
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return {
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r0),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r1),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r2),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r3),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r4),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r5),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r6),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r7),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r8),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r9),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_r10),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_fp),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_ip),
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reinterpret_cast<uintptr_t*>(&thread_context->arm_sp),
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// arm_lr and arm_pc do not require rewriting because they contain
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// addresses of executable code, not addresses in the stack.
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};
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#elif defined(ARCH_CPU_ARM_FAMILY) && \
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defined(ARCH_CPU_64_BITS) // #if defined(ARCH_CPU_ARM_FAMILY) &&
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// defined(ARCH_CPU_32_BITS)
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std::vector<uintptr_t*> registers;
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registers.reserve(12);
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// Return the set of callee-save registers per the ARM 64-bit Procedure Call
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// Standard section 5.1.1, plus the stack pointer.
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registers.push_back(reinterpret_cast<uintptr_t*>(&thread_context->sp));
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for (size_t i = 19; i <= 29; ++i)
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registers.push_back(reinterpret_cast<uintptr_t*>(&thread_context->regs[i]));
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return registers;
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#elif defined(ARCH_CPU_X86_FAMILY) && defined(ARCH_CPU_32_BITS)
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return {
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// Return the set of callee-save registers per the i386 System V ABI
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// section 2.2.3, plus the stack pointer.
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EBX]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EBP]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_ESI]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_EDI]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_ESP]),
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};
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#elif defined(ARCH_CPU_X86_FAMILY) && defined(ARCH_CPU_64_BITS)
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return {
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// Return the set of callee-save registers per the x86-64 System V ABI
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// section 3.2.1, plus the stack pointer.
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RBP]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RBX]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R12]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R13]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R14]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_R15]),
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reinterpret_cast<uintptr_t*>(&thread_context->gregs[REG_RSP]),
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};
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#else // #if defined(ARCH_CPU_ARM_FAMILY) && defined(ARCH_CPU_32_BITS)
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// Unimplemented for other architectures.
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return {};
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#endif
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}
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} // namespace base
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