671 lines
14 KiB
Perl
671 lines
14 KiB
Perl
#! /usr/bin/env perl
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# Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the OpenSSL license (the "License"). You may not use
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# this file except in compliance with the License. You can obtain a copy
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# in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
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# project. The module is, however, dual licensed under OpenSSL and
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# CRYPTOGAMS licenses depending on where you obtain it. For further
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# details see http://www.openssl.org/~appro/cryptogams/.
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# ====================================================================
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#
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# GHASH for for PowerISA v2.07.
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#
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# July 2014
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#
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# Accurate performance measurements are problematic, because it's
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# always virtualized setup with possibly throttled processor.
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# Relative comparison is therefore more informative. This initial
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# version is ~2.1x slower than hardware-assisted AES-128-CTR, ~12x
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# faster than "4-bit" integer-only compiler-generated 64-bit code.
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# "Initial version" means that there is room for futher improvement.
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# May 2016
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#
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# 2x aggregated reduction improves performance by 50% (resulting
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# performance on POWER8 is 1 cycle per processed byte), and 4x
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# aggregated reduction - by 170% or 2.7x (resulting in 0.55 cpb).
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$flavour=shift;
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$output =shift;
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if ($flavour =~ /64/) {
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$SIZE_T=8;
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$LRSAVE=2*$SIZE_T;
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$STU="stdu";
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$POP="ld";
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$PUSH="std";
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$UCMP="cmpld";
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$SHRI="srdi";
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} elsif ($flavour =~ /32/) {
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$SIZE_T=4;
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$LRSAVE=$SIZE_T;
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$STU="stwu";
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$POP="lwz";
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$PUSH="stw";
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$UCMP="cmplw";
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$SHRI="srwi";
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} else { die "nonsense $flavour"; }
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$sp="r1";
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$FRAME=6*$SIZE_T+13*16; # 13*16 is for v20-v31 offload
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
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( $xlate="${dir}../../../perlasm/ppc-xlate.pl" and -f $xlate) or
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die "can't locate ppc-xlate.pl";
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open STDOUT,"| $^X $xlate $flavour $output" || die "can't call $xlate: $!";
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my ($Xip,$Htbl,$inp,$len)=map("r$_",(3..6)); # argument block
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my ($Xl,$Xm,$Xh,$IN)=map("v$_",(0..3));
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my ($zero,$t0,$t1,$t2,$xC2,$H,$Hh,$Hl,$lemask)=map("v$_",(4..12));
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my ($Xl1,$Xm1,$Xh1,$IN1,$H2,$H2h,$H2l)=map("v$_",(13..19));
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my $vrsave="r12";
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$code=<<___;
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.machine "any"
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.text
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.globl .gcm_init_p8
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.align 5
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.gcm_init_p8:
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li r0,-4096
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li r8,0x10
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mfspr $vrsave,256
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li r9,0x20
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mtspr 256,r0
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li r10,0x30
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lvx_u $H,0,r4 # load H
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vspltisb $xC2,-16 # 0xf0
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vspltisb $t0,1 # one
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vaddubm $xC2,$xC2,$xC2 # 0xe0
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vxor $zero,$zero,$zero
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vor $xC2,$xC2,$t0 # 0xe1
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vsldoi $xC2,$xC2,$zero,15 # 0xe1...
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vsldoi $t1,$zero,$t0,1 # ...1
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vaddubm $xC2,$xC2,$xC2 # 0xc2...
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vspltisb $t2,7
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vor $xC2,$xC2,$t1 # 0xc2....01
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vspltb $t1,$H,0 # most significant byte
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vsl $H,$H,$t0 # H<<=1
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vsrab $t1,$t1,$t2 # broadcast carry bit
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vand $t1,$t1,$xC2
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vxor $IN,$H,$t1 # twisted H
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vsldoi $H,$IN,$IN,8 # twist even more ...
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vsldoi $xC2,$zero,$xC2,8 # 0xc2.0
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vsldoi $Hl,$zero,$H,8 # ... and split
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vsldoi $Hh,$H,$zero,8
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stvx_u $xC2,0,r3 # save pre-computed table
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stvx_u $Hl,r8,r3
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li r8,0x40
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stvx_u $H, r9,r3
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li r9,0x50
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stvx_u $Hh,r10,r3
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li r10,0x60
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vpmsumd $Xl,$IN,$Hl # H.lo·H.lo
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vpmsumd $Xm,$IN,$H # H.hi·H.lo+H.lo·H.hi
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vpmsumd $Xh,$IN,$Hh # H.hi·H.hi
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vpmsumd $t2,$Xl,$xC2 # 1st reduction phase
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vsldoi $t0,$Xm,$zero,8
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vsldoi $t1,$zero,$Xm,8
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vxor $Xl,$Xl,$t0
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vxor $Xh,$Xh,$t1
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vsldoi $Xl,$Xl,$Xl,8
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vxor $Xl,$Xl,$t2
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vsldoi $t1,$Xl,$Xl,8 # 2nd reduction phase
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vpmsumd $Xl,$Xl,$xC2
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vxor $t1,$t1,$Xh
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vxor $IN1,$Xl,$t1
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vsldoi $H2,$IN1,$IN1,8
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vsldoi $H2l,$zero,$H2,8
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vsldoi $H2h,$H2,$zero,8
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stvx_u $H2l,r8,r3 # save H^2
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li r8,0x70
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stvx_u $H2,r9,r3
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li r9,0x80
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stvx_u $H2h,r10,r3
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li r10,0x90
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___
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{
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my ($t4,$t5,$t6) = ($Hl,$H,$Hh);
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$code.=<<___;
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vpmsumd $Xl,$IN,$H2l # H.lo·H^2.lo
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vpmsumd $Xl1,$IN1,$H2l # H^2.lo·H^2.lo
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vpmsumd $Xm,$IN,$H2 # H.hi·H^2.lo+H.lo·H^2.hi
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vpmsumd $Xm1,$IN1,$H2 # H^2.hi·H^2.lo+H^2.lo·H^2.hi
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vpmsumd $Xh,$IN,$H2h # H.hi·H^2.hi
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vpmsumd $Xh1,$IN1,$H2h # H^2.hi·H^2.hi
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vpmsumd $t2,$Xl,$xC2 # 1st reduction phase
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vpmsumd $t6,$Xl1,$xC2 # 1st reduction phase
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vsldoi $t0,$Xm,$zero,8
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vsldoi $t1,$zero,$Xm,8
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vsldoi $t4,$Xm1,$zero,8
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vsldoi $t5,$zero,$Xm1,8
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vxor $Xl,$Xl,$t0
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vxor $Xh,$Xh,$t1
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vxor $Xl1,$Xl1,$t4
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vxor $Xh1,$Xh1,$t5
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vsldoi $Xl,$Xl,$Xl,8
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vsldoi $Xl1,$Xl1,$Xl1,8
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vxor $Xl,$Xl,$t2
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vxor $Xl1,$Xl1,$t6
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vsldoi $t1,$Xl,$Xl,8 # 2nd reduction phase
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vsldoi $t5,$Xl1,$Xl1,8 # 2nd reduction phase
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vpmsumd $Xl,$Xl,$xC2
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vpmsumd $Xl1,$Xl1,$xC2
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vxor $t1,$t1,$Xh
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vxor $t5,$t5,$Xh1
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vxor $Xl,$Xl,$t1
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vxor $Xl1,$Xl1,$t5
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vsldoi $H,$Xl,$Xl,8
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vsldoi $H2,$Xl1,$Xl1,8
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vsldoi $Hl,$zero,$H,8
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vsldoi $Hh,$H,$zero,8
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vsldoi $H2l,$zero,$H2,8
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vsldoi $H2h,$H2,$zero,8
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stvx_u $Hl,r8,r3 # save H^3
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li r8,0xa0
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stvx_u $H,r9,r3
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li r9,0xb0
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stvx_u $Hh,r10,r3
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li r10,0xc0
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stvx_u $H2l,r8,r3 # save H^4
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stvx_u $H2,r9,r3
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stvx_u $H2h,r10,r3
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mtspr 256,$vrsave
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blr
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.long 0
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.byte 0,12,0x14,0,0,0,2,0
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.long 0
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.size .gcm_init_p8,.-.gcm_init_p8
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___
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}
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$code.=<<___;
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.globl .gcm_gmult_p8
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.align 5
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.gcm_gmult_p8:
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lis r0,0xfff8
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li r8,0x10
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mfspr $vrsave,256
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li r9,0x20
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mtspr 256,r0
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li r10,0x30
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lvx_u $IN,0,$Xip # load Xi
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lvx_u $Hl,r8,$Htbl # load pre-computed table
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le?lvsl $lemask,r0,r0
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lvx_u $H, r9,$Htbl
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le?vspltisb $t0,0x07
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lvx_u $Hh,r10,$Htbl
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le?vxor $lemask,$lemask,$t0
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lvx_u $xC2,0,$Htbl
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le?vperm $IN,$IN,$IN,$lemask
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vxor $zero,$zero,$zero
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vpmsumd $Xl,$IN,$Hl # H.lo·Xi.lo
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vpmsumd $Xm,$IN,$H # H.hi·Xi.lo+H.lo·Xi.hi
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vpmsumd $Xh,$IN,$Hh # H.hi·Xi.hi
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vpmsumd $t2,$Xl,$xC2 # 1st reduction phase
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vsldoi $t0,$Xm,$zero,8
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vsldoi $t1,$zero,$Xm,8
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vxor $Xl,$Xl,$t0
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vxor $Xh,$Xh,$t1
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vsldoi $Xl,$Xl,$Xl,8
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vxor $Xl,$Xl,$t2
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vsldoi $t1,$Xl,$Xl,8 # 2nd reduction phase
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vpmsumd $Xl,$Xl,$xC2
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vxor $t1,$t1,$Xh
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vxor $Xl,$Xl,$t1
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le?vperm $Xl,$Xl,$Xl,$lemask
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stvx_u $Xl,0,$Xip # write out Xi
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mtspr 256,$vrsave
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blr
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.long 0
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.byte 0,12,0x14,0,0,0,2,0
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.long 0
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.size .gcm_gmult_p8,.-.gcm_gmult_p8
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.globl .gcm_ghash_p8
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.align 5
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.gcm_ghash_p8:
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li r0,-4096
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li r8,0x10
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mfspr $vrsave,256
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li r9,0x20
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mtspr 256,r0
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li r10,0x30
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lvx_u $Xl,0,$Xip # load Xi
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lvx_u $Hl,r8,$Htbl # load pre-computed table
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li r8,0x40
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le?lvsl $lemask,r0,r0
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lvx_u $H, r9,$Htbl
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li r9,0x50
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le?vspltisb $t0,0x07
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lvx_u $Hh,r10,$Htbl
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li r10,0x60
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le?vxor $lemask,$lemask,$t0
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lvx_u $xC2,0,$Htbl
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le?vperm $Xl,$Xl,$Xl,$lemask
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vxor $zero,$zero,$zero
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${UCMP}i $len,64
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bge Lgcm_ghash_p8_4x
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lvx_u $IN,0,$inp
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addi $inp,$inp,16
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subic. $len,$len,16
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le?vperm $IN,$IN,$IN,$lemask
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vxor $IN,$IN,$Xl
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beq Lshort
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lvx_u $H2l,r8,$Htbl # load H^2
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li r8,16
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lvx_u $H2, r9,$Htbl
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add r9,$inp,$len # end of input
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lvx_u $H2h,r10,$Htbl
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be?b Loop_2x
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.align 5
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Loop_2x:
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lvx_u $IN1,0,$inp
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le?vperm $IN1,$IN1,$IN1,$lemask
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subic $len,$len,32
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vpmsumd $Xl,$IN,$H2l # H^2.lo·Xi.lo
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vpmsumd $Xl1,$IN1,$Hl # H.lo·Xi+1.lo
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subfe r0,r0,r0 # borrow?-1:0
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vpmsumd $Xm,$IN,$H2 # H^2.hi·Xi.lo+H^2.lo·Xi.hi
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vpmsumd $Xm1,$IN1,$H # H.hi·Xi+1.lo+H.lo·Xi+1.hi
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and r0,r0,$len
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vpmsumd $Xh,$IN,$H2h # H^2.hi·Xi.hi
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vpmsumd $Xh1,$IN1,$Hh # H.hi·Xi+1.hi
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add $inp,$inp,r0
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vxor $Xl,$Xl,$Xl1
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vxor $Xm,$Xm,$Xm1
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vpmsumd $t2,$Xl,$xC2 # 1st reduction phase
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vsldoi $t0,$Xm,$zero,8
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vsldoi $t1,$zero,$Xm,8
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vxor $Xh,$Xh,$Xh1
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vxor $Xl,$Xl,$t0
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vxor $Xh,$Xh,$t1
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vsldoi $Xl,$Xl,$Xl,8
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vxor $Xl,$Xl,$t2
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lvx_u $IN,r8,$inp
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addi $inp,$inp,32
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vsldoi $t1,$Xl,$Xl,8 # 2nd reduction phase
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vpmsumd $Xl,$Xl,$xC2
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le?vperm $IN,$IN,$IN,$lemask
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vxor $t1,$t1,$Xh
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vxor $IN,$IN,$t1
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vxor $IN,$IN,$Xl
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$UCMP r9,$inp
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bgt Loop_2x # done yet?
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cmplwi $len,0
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bne Leven
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Lshort:
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vpmsumd $Xl,$IN,$Hl # H.lo·Xi.lo
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vpmsumd $Xm,$IN,$H # H.hi·Xi.lo+H.lo·Xi.hi
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vpmsumd $Xh,$IN,$Hh # H.hi·Xi.hi
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vpmsumd $t2,$Xl,$xC2 # 1st reduction phase
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vsldoi $t0,$Xm,$zero,8
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vsldoi $t1,$zero,$Xm,8
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vxor $Xl,$Xl,$t0
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vxor $Xh,$Xh,$t1
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vsldoi $Xl,$Xl,$Xl,8
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vxor $Xl,$Xl,$t2
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vsldoi $t1,$Xl,$Xl,8 # 2nd reduction phase
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vpmsumd $Xl,$Xl,$xC2
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vxor $t1,$t1,$Xh
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Leven:
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vxor $Xl,$Xl,$t1
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le?vperm $Xl,$Xl,$Xl,$lemask
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stvx_u $Xl,0,$Xip # write out Xi
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mtspr 256,$vrsave
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blr
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.long 0
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.byte 0,12,0x14,0,0,0,4,0
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.long 0
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___
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{
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my ($Xl3,$Xm2,$IN2,$H3l,$H3,$H3h,
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$Xh3,$Xm3,$IN3,$H4l,$H4,$H4h) = map("v$_",(20..31));
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my $IN0=$IN;
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my ($H21l,$H21h,$loperm,$hiperm) = ($Hl,$Hh,$H2l,$H2h);
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$code.=<<___;
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.align 5
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.gcm_ghash_p8_4x:
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Lgcm_ghash_p8_4x:
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$STU $sp,-$FRAME($sp)
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li r10,`15+6*$SIZE_T`
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li r11,`31+6*$SIZE_T`
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stvx v20,r10,$sp
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addi r10,r10,32
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stvx v21,r11,$sp
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addi r11,r11,32
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stvx v22,r10,$sp
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addi r10,r10,32
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stvx v23,r11,$sp
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addi r11,r11,32
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stvx v24,r10,$sp
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addi r10,r10,32
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stvx v25,r11,$sp
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addi r11,r11,32
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stvx v26,r10,$sp
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addi r10,r10,32
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stvx v27,r11,$sp
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addi r11,r11,32
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stvx v28,r10,$sp
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addi r10,r10,32
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stvx v29,r11,$sp
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addi r11,r11,32
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stvx v30,r10,$sp
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li r10,0x60
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stvx v31,r11,$sp
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li r0,-1
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stw $vrsave,`$FRAME-4`($sp) # save vrsave
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mtspr 256,r0 # preserve all AltiVec registers
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lvsl $t0,0,r8 # 0x0001..0e0f
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#lvx_u $H2l,r8,$Htbl # load H^2
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li r8,0x70
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lvx_u $H2, r9,$Htbl
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li r9,0x80
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vspltisb $t1,8 # 0x0808..0808
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#lvx_u $H2h,r10,$Htbl
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li r10,0x90
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lvx_u $H3l,r8,$Htbl # load H^3
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li r8,0xa0
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lvx_u $H3, r9,$Htbl
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li r9,0xb0
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lvx_u $H3h,r10,$Htbl
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li r10,0xc0
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lvx_u $H4l,r8,$Htbl # load H^4
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li r8,0x10
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lvx_u $H4, r9,$Htbl
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li r9,0x20
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lvx_u $H4h,r10,$Htbl
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li r10,0x30
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vsldoi $t2,$zero,$t1,8 # 0x0000..0808
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vaddubm $hiperm,$t0,$t2 # 0x0001..1617
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vaddubm $loperm,$t1,$hiperm # 0x0809..1e1f
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$SHRI $len,$len,4 # this allows to use sign bit
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# as carry
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lvx_u $IN0,0,$inp # load input
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lvx_u $IN1,r8,$inp
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subic. $len,$len,8
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lvx_u $IN2,r9,$inp
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lvx_u $IN3,r10,$inp
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addi $inp,$inp,0x40
|
|
le?vperm $IN0,$IN0,$IN0,$lemask
|
|
le?vperm $IN1,$IN1,$IN1,$lemask
|
|
le?vperm $IN2,$IN2,$IN2,$lemask
|
|
le?vperm $IN3,$IN3,$IN3,$lemask
|
|
|
|
vxor $Xh,$IN0,$Xl
|
|
|
|
vpmsumd $Xl1,$IN1,$H3l
|
|
vpmsumd $Xm1,$IN1,$H3
|
|
vpmsumd $Xh1,$IN1,$H3h
|
|
|
|
vperm $H21l,$H2,$H,$hiperm
|
|
vperm $t0,$IN2,$IN3,$loperm
|
|
vperm $H21h,$H2,$H,$loperm
|
|
vperm $t1,$IN2,$IN3,$hiperm
|
|
vpmsumd $Xm2,$IN2,$H2 # H^2.lo·Xi+2.hi+H^2.hi·Xi+2.lo
|
|
vpmsumd $Xl3,$t0,$H21l # H^2.lo·Xi+2.lo+H.lo·Xi+3.lo
|
|
vpmsumd $Xm3,$IN3,$H # H.hi·Xi+3.lo +H.lo·Xi+3.hi
|
|
vpmsumd $Xh3,$t1,$H21h # H^2.hi·Xi+2.hi+H.hi·Xi+3.hi
|
|
|
|
vxor $Xm2,$Xm2,$Xm1
|
|
vxor $Xl3,$Xl3,$Xl1
|
|
vxor $Xm3,$Xm3,$Xm2
|
|
vxor $Xh3,$Xh3,$Xh1
|
|
|
|
blt Ltail_4x
|
|
|
|
Loop_4x:
|
|
lvx_u $IN0,0,$inp
|
|
lvx_u $IN1,r8,$inp
|
|
subic. $len,$len,4
|
|
lvx_u $IN2,r9,$inp
|
|
lvx_u $IN3,r10,$inp
|
|
addi $inp,$inp,0x40
|
|
le?vperm $IN1,$IN1,$IN1,$lemask
|
|
le?vperm $IN2,$IN2,$IN2,$lemask
|
|
le?vperm $IN3,$IN3,$IN3,$lemask
|
|
le?vperm $IN0,$IN0,$IN0,$lemask
|
|
|
|
vpmsumd $Xl,$Xh,$H4l # H^4.lo·Xi.lo
|
|
vpmsumd $Xm,$Xh,$H4 # H^4.hi·Xi.lo+H^4.lo·Xi.hi
|
|
vpmsumd $Xh,$Xh,$H4h # H^4.hi·Xi.hi
|
|
vpmsumd $Xl1,$IN1,$H3l
|
|
vpmsumd $Xm1,$IN1,$H3
|
|
vpmsumd $Xh1,$IN1,$H3h
|
|
|
|
vxor $Xl,$Xl,$Xl3
|
|
vxor $Xm,$Xm,$Xm3
|
|
vxor $Xh,$Xh,$Xh3
|
|
vperm $t0,$IN2,$IN3,$loperm
|
|
vperm $t1,$IN2,$IN3,$hiperm
|
|
|
|
vpmsumd $t2,$Xl,$xC2 # 1st reduction phase
|
|
vpmsumd $Xl3,$t0,$H21l # H.lo·Xi+3.lo +H^2.lo·Xi+2.lo
|
|
vpmsumd $Xh3,$t1,$H21h # H.hi·Xi+3.hi +H^2.hi·Xi+2.hi
|
|
|
|
vsldoi $t0,$Xm,$zero,8
|
|
vsldoi $t1,$zero,$Xm,8
|
|
vxor $Xl,$Xl,$t0
|
|
vxor $Xh,$Xh,$t1
|
|
|
|
vsldoi $Xl,$Xl,$Xl,8
|
|
vxor $Xl,$Xl,$t2
|
|
|
|
vsldoi $t1,$Xl,$Xl,8 # 2nd reduction phase
|
|
vpmsumd $Xm2,$IN2,$H2 # H^2.hi·Xi+2.lo+H^2.lo·Xi+2.hi
|
|
vpmsumd $Xm3,$IN3,$H # H.hi·Xi+3.lo +H.lo·Xi+3.hi
|
|
vpmsumd $Xl,$Xl,$xC2
|
|
|
|
vxor $Xl3,$Xl3,$Xl1
|
|
vxor $Xh3,$Xh3,$Xh1
|
|
vxor $Xh,$Xh,$IN0
|
|
vxor $Xm2,$Xm2,$Xm1
|
|
vxor $Xh,$Xh,$t1
|
|
vxor $Xm3,$Xm3,$Xm2
|
|
vxor $Xh,$Xh,$Xl
|
|
bge Loop_4x
|
|
|
|
Ltail_4x:
|
|
vpmsumd $Xl,$Xh,$H4l # H^4.lo·Xi.lo
|
|
vpmsumd $Xm,$Xh,$H4 # H^4.hi·Xi.lo+H^4.lo·Xi.hi
|
|
vpmsumd $Xh,$Xh,$H4h # H^4.hi·Xi.hi
|
|
|
|
vxor $Xl,$Xl,$Xl3
|
|
vxor $Xm,$Xm,$Xm3
|
|
|
|
vpmsumd $t2,$Xl,$xC2 # 1st reduction phase
|
|
|
|
vsldoi $t0,$Xm,$zero,8
|
|
vsldoi $t1,$zero,$Xm,8
|
|
vxor $Xh,$Xh,$Xh3
|
|
vxor $Xl,$Xl,$t0
|
|
vxor $Xh,$Xh,$t1
|
|
|
|
vsldoi $Xl,$Xl,$Xl,8
|
|
vxor $Xl,$Xl,$t2
|
|
|
|
vsldoi $t1,$Xl,$Xl,8 # 2nd reduction phase
|
|
vpmsumd $Xl,$Xl,$xC2
|
|
vxor $t1,$t1,$Xh
|
|
vxor $Xl,$Xl,$t1
|
|
|
|
addic. $len,$len,4
|
|
beq Ldone_4x
|
|
|
|
lvx_u $IN0,0,$inp
|
|
${UCMP}i $len,2
|
|
li $len,-4
|
|
blt Lone
|
|
lvx_u $IN1,r8,$inp
|
|
beq Ltwo
|
|
|
|
Lthree:
|
|
lvx_u $IN2,r9,$inp
|
|
le?vperm $IN0,$IN0,$IN0,$lemask
|
|
le?vperm $IN1,$IN1,$IN1,$lemask
|
|
le?vperm $IN2,$IN2,$IN2,$lemask
|
|
|
|
vxor $Xh,$IN0,$Xl
|
|
vmr $H4l,$H3l
|
|
vmr $H4, $H3
|
|
vmr $H4h,$H3h
|
|
|
|
vperm $t0,$IN1,$IN2,$loperm
|
|
vperm $t1,$IN1,$IN2,$hiperm
|
|
vpmsumd $Xm2,$IN1,$H2 # H^2.lo·Xi+1.hi+H^2.hi·Xi+1.lo
|
|
vpmsumd $Xm3,$IN2,$H # H.hi·Xi+2.lo +H.lo·Xi+2.hi
|
|
vpmsumd $Xl3,$t0,$H21l # H^2.lo·Xi+1.lo+H.lo·Xi+2.lo
|
|
vpmsumd $Xh3,$t1,$H21h # H^2.hi·Xi+1.hi+H.hi·Xi+2.hi
|
|
|
|
vxor $Xm3,$Xm3,$Xm2
|
|
b Ltail_4x
|
|
|
|
.align 4
|
|
Ltwo:
|
|
le?vperm $IN0,$IN0,$IN0,$lemask
|
|
le?vperm $IN1,$IN1,$IN1,$lemask
|
|
|
|
vxor $Xh,$IN0,$Xl
|
|
vperm $t0,$zero,$IN1,$loperm
|
|
vperm $t1,$zero,$IN1,$hiperm
|
|
|
|
vsldoi $H4l,$zero,$H2,8
|
|
vmr $H4, $H2
|
|
vsldoi $H4h,$H2,$zero,8
|
|
|
|
vpmsumd $Xl3,$t0, $H21l # H.lo·Xi+1.lo
|
|
vpmsumd $Xm3,$IN1,$H # H.hi·Xi+1.lo+H.lo·Xi+2.hi
|
|
vpmsumd $Xh3,$t1, $H21h # H.hi·Xi+1.hi
|
|
|
|
b Ltail_4x
|
|
|
|
.align 4
|
|
Lone:
|
|
le?vperm $IN0,$IN0,$IN0,$lemask
|
|
|
|
vsldoi $H4l,$zero,$H,8
|
|
vmr $H4, $H
|
|
vsldoi $H4h,$H,$zero,8
|
|
|
|
vxor $Xh,$IN0,$Xl
|
|
vxor $Xl3,$Xl3,$Xl3
|
|
vxor $Xm3,$Xm3,$Xm3
|
|
vxor $Xh3,$Xh3,$Xh3
|
|
|
|
b Ltail_4x
|
|
|
|
Ldone_4x:
|
|
le?vperm $Xl,$Xl,$Xl,$lemask
|
|
stvx_u $Xl,0,$Xip # write out Xi
|
|
|
|
li r10,`15+6*$SIZE_T`
|
|
li r11,`31+6*$SIZE_T`
|
|
mtspr 256,$vrsave
|
|
lvx v20,r10,$sp
|
|
addi r10,r10,32
|
|
lvx v21,r11,$sp
|
|
addi r11,r11,32
|
|
lvx v22,r10,$sp
|
|
addi r10,r10,32
|
|
lvx v23,r11,$sp
|
|
addi r11,r11,32
|
|
lvx v24,r10,$sp
|
|
addi r10,r10,32
|
|
lvx v25,r11,$sp
|
|
addi r11,r11,32
|
|
lvx v26,r10,$sp
|
|
addi r10,r10,32
|
|
lvx v27,r11,$sp
|
|
addi r11,r11,32
|
|
lvx v28,r10,$sp
|
|
addi r10,r10,32
|
|
lvx v29,r11,$sp
|
|
addi r11,r11,32
|
|
lvx v30,r10,$sp
|
|
lvx v31,r11,$sp
|
|
addi $sp,$sp,$FRAME
|
|
blr
|
|
.long 0
|
|
.byte 0,12,0x04,0,0x80,0,4,0
|
|
.long 0
|
|
___
|
|
}
|
|
$code.=<<___;
|
|
.size .gcm_ghash_p8,.-.gcm_ghash_p8
|
|
|
|
.asciz "GHASH for PowerISA 2.07, CRYPTOGAMS by <appro\@openssl.org>"
|
|
.align 2
|
|
___
|
|
|
|
foreach (split("\n",$code)) {
|
|
s/\`([^\`]*)\`/eval $1/geo;
|
|
|
|
if ($flavour =~ /le$/o) { # little-endian
|
|
s/le\?//o or
|
|
s/be\?/#be#/o;
|
|
} else {
|
|
s/le\?/#le#/o or
|
|
s/be\?//o;
|
|
}
|
|
print $_,"\n";
|
|
}
|
|
|
|
close STDOUT or die "error closing STDOUT"; # enforce flush
|